Standard cell for semiconductor device

US8759885B1 · kind B1 · utility

Assignee

• Freeescale Semiconductor, Inc. · US

Inventors

• Ankit Jain · Mountain View, US
• Vikas Tripathi · Kanpur, IN

Key dates

• Filing date: Apr 30, 2013
• Grant date: Jun 24, 2014
• Expiry date: Apr 30, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/85

Abstract

A standard cell for a semiconductor device has first and second opposing boundaries and third and fourth opposite boundaries, and includes first and second active regions formed in a semiconductor substrate. The first and second active regions are a first predetermined distance (a) from the first and second boundaries, respectively. A gate electrode is formed over the first and second active regions. First and second dummy diffusions layers are formed along the third boundary and are the first predetermined distance (a) from the first and second boundaries and a second predetermined distance (b) from the first and second active regions, respectively. Third and fourth dummy diffusions layers are formed along the fourth boundary and are the first predetermined distance (a) from the first and second boundaries and a third predetermined distance (b′) from the first and second active regions, respectively.