Patent · US Active

Epitaxial silicon growth

US8759944B2 · kind B2 · utility

2Cited by
12References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 21, 2013
Grant dateJun 24, 2014
Priority date—
Expiry dateMay 21, 2033

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6211
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

Memory cell structures, including PSOIs, NANDs, NORs, FinFETs, etc., and methods of fabrication have been described that include a method of epitaxial silicon growth. The method includes providing a silicon layer on a substrate. A dielectric layer is provided on the silicon layer. A trench is formed in the dielectric layer to expose the silicon layer, the trench having trench walls in the <100> direction. The method includes epitaxially growing silicon between trench walls formed in the dielectric layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.