Nonvolatile semiconductor memory device
US8760935B2 · kind B2 · utility
4Cited by
6References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 29, 2012 |
| Grant date | Jun 24, 2014 |
| Priority date | — |
| Expiry date | Jul 7, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A block dividing unit groups one-word lines into p groups, to divide a block into p divisional blocks. An erasing unit has an erasing operation performed on data stored in memory cells in a memory cell array, on a divisional block basis. An erasing verifying unit has an erasing verifying operation performed on memory cells subjected to the erasing operation, on a divisional block basis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.