Hardware assistance for page table coherence with guest page mappings
US8762684B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2012 |
| Grant date | Jun 24, 2014 |
| Priority date | — |
| Expiry date | Jul 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2009/45583
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the present invention include a memory management unit (MMU) configured to, in response to a write access targeting a guest page mapping of a guest virtual page number (GVPN) to a guest physical page number (GPPN) within a guest page table, identify a first page mapping that associates the GVPN with a physical page number (PPN). The MMU is also configured to determine whether a traced write indication is associated with the first page mapping and, if so, record update information identifying the targeted guest page mapping. The update information is used to reestablish coherence between the guest page mapping and the first page mapping. The MMU is further configured to perform the write access.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.