Circuit macro placement using macro aspect ratio based on ports
US8762919B2 · kind B2 · utility
2Cited by
7References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 19, 2010 |
| Grant date | Jun 24, 2014 |
| Priority date | — |
| Expiry date | Aug 14, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/392
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Fixed outline shaped and modifiable outline shaped random logic macros of an electronic circuit design are manipulated by modifying an outline of a modifiable outline shape macro based on criteria consisting of any one of a macro port weight value, a macro port ordering; a macro rapport constraint or a macro logic depth and placing resulting macros at locations on an integrated circuit (chip).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.