Test structure for detection of gap in conductive layer of multilayer gate stack
US8766259B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 1, 2013 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Feb 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/34
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor structure including a test structure for detection of a gap in a conductive layer of the semiconductor structure includes a semiconductor substrate; the test structure, the test structure being located on the semiconductor substrate, the test structure comprising a multilayer gate stack, wherein the multilayer gate stack includes a single conductive layer region including: a gate dielectric located on the semiconductor substrate; the conductive layer located on the gate dielectric; and an undoped amorphous silicon layer located on the conductive layer; and wherein the test structure is configured to detect the presence of the gap in the conductive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.