Nonvolatile semiconductor memory device
US8767460B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 12, 2012 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jul 23, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B41/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A plurality of element isolation insulating films are formed in a semiconductor substrate in a memory cell array and have a first direction as a long direction. A plurality of element formation regions are formed isolated by the element isolation insulating films. A memory string is formed in each of the element formation regions. A plurality of element formation region groups are each configured by the element formation regions. In a memory cell array, in a second direction orthogonal to the first direction, a spacing between the element formation region groups is configured larger than a spacing between the element formation regions in each of the element formation region groups. A control circuit executes a write operation on the memory cell array on an element formation region group basis.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.