Dynamic fault detection and repair in a data communications mechanism
US8767531B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 14, 2011 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Jan 5, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L69/40
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A communications link of multiple parallel communications lines includes at least one redundant line. In a first aspect, the lines are periodically recalibrated one at a time while the others carry functional data. If a fault is detected, the faulty line is disabled and the remaining previously calibrated lines transmit functional data. In a second aspect, impending line malfunction is detected from anomalies during calibration. In a third aspect, line malfunction is detected from receiver circuit output by determining a logical lane upon which each detected error occurs, and by mapping the logical lane to a physical line currently carrying the logical lane data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.