Monitoring thread synchronization in a distributed cache
US8769211B2 · kind B2 · utility
0Cited by
3References
12Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 22, 2009 |
| Grant date | Jul 1, 2014 |
| Priority date | — |
| Expiry date | Apr 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0842
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems, apparatus, and method of monitoring synchronization in a distributed cache are described. In an exemplary embodiment, a first and second processing core process a first and second thread respectively. A first and second distributed cache slices store data for either or both of the first and second processing cores. A first and second core interface co-located with the first and second processing cores respectively maintain a finite state machine (FSM) to be executed in response to receiving a request from a thread of its co-located processing core to monitor a cache line in the distributed cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.