Integrated circuits using guard rings for ESD, systems, and methods for forming the integrated circuits

US8772092B2 · kind B2 · utility

Assignee

• TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD. · TW

Inventors

• Ming-Song Sheu · Hsinchu, TW
• Jian-Hsing Lee · Xinwen, TW
• Yu-Chang Jong · Baoshan, TW
• Chun-Chien Tsai · Yongkang, TW

Key dates

• Filing date: Nov 29, 2012
• Grant date: Jul 8, 2014
• Expiry date: Jan 4, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/307

Abstract

A method for forming an integrated circuit. The method includes forming a first guard ring around at least one transistor over a substrate, the first guard ring having a first type dopant. The method further includes forming a second guard ring around the first guard ring, the second guard ring having a second type dopant. The method includes forming a first doped region adjacent to the first guard ring, the first doped region having the second type dopant. The method further includes forming a second doped region adjacent to the second guard ring, the second doped region having the first type dopant, wherein the first guard ring, the second guard ring, the first doped region, and the second doped region are capable of being operable as a first silicon controlled rectifier (SCR) to substantially release an electrostatic discharge (ESD).