Fabrication of a localized thick box with planar oxide/SOI interface on bulk silicon substrate for silicon photonics integration
US8772902B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 19, 2012 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Apr 19, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76289
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Line trenches are formed in a stack of a bulk semiconductor substrate and an oxygen-impermeable layer such that the depth of the trenches in the bulk semiconductor substrate is greater than the lateral spacing between a pair of adjacently located line trenches. Oxygen-impermeable spacers are formed on sidewalls of the line trenches. An isotropic etch, either alone or in combination with oxidation, removes a semiconductor material from below the oxygen-impermeable spacers to expand the lateral extent of expanded-bottom portions of the line trenches, and to reduce the lateral spacing between adjacent expanded-bottom portions. The semiconductor material around the bottom portions is oxidized to form a semiconductor oxide portion that underlies multiple oxygen-impermeable spacers. Semiconductor-on-insulator (SOI) portions are formed above the semiconductor oxide portion and within the bulk semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.