Semiconductor memory device and method of writing into semiconductor memory device
US8773918B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Nov 30, 2012 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Dec 9, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The semiconductor memory device includes a memory cell, a pair of bit lines and a cell power line connected to the memory cell, a first switch connected to the bit lines and a power voltage line, a second switch connected to the cell power line and a write assist cell power line, and a write control circuit configured to control the bit lines, the first switch and the second switch, wherein the write control circuit applies a first voltage of a high level to one bit line and a second voltage of a low level to the other bit line, connects one bit line to the power voltage line and disconnects the other bit line from the power voltage line by the first switch, and then connects the cell power line to the write assist cell power line lower which is than the first voltage by the second switch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.