Memory device and method for writing therefor
US8773923B2 · kind B2 · utility
8Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2012 |
| Grant date | Jul 8, 2014 |
| Priority date | — |
| Expiry date | Sep 3, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for writing a memory cell in a specific write cycle is provided. The method includes the following steps: providing a first signal having a first transition edge in the specific write cycle; providing a second signal having a second transition edge in the specific write cycle, wherein the second transition edge lags behind the first transition edge; providing a first voltage level to the memory cell; and lowering the first voltage level to a second voltage level in the specific write cycle for writing the memory cell in response to the second transition edge. A memory device is also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.