Patent · US Active

System and method for a bus interface

US8775714B2 · kind B2 · utility

3Cited by

5References

19Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Thomas Leitner · Dortmund, DE
Johannes Meusburger · Linz, AT
Joachim Fliesser · Ansfelden, AT

Key dates

Filing date	Jan 30, 2012
Grant date	Jul 8, 2014
Priority date	—
Expiry date	Jul 13, 2032

Classification

Technology area (CPC G)Physics
CPC primaryG06F13/4291
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

In accordance with an embodiment, a method of operating a bus interface circuit includes detecting a start sequence on a plurality of input terminals, determining whether a first input terminal and a second input terminal is a data terminal and a clock terminal, respectively, or whether the first input terminal and the second terminal is a clock terminal and a data terminal, respectively. The method also includes routing the first input terminal to a data terminal and the second input terminal to a clock terminal if first input terminal and the second input terminal are determined to be a data terminal and a clock terminal, respectively, and routing the first input terminal to the clock terminal and the second input terminal to the data terminal if first input terminal and the second input terminal are determined to be a clock terminal and a data terminal, respectively.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.