Clock generator

US8779811B2 · kind B2 · utility

Inventors

• Marco Passerini · Lozza, IT
• Stefano Surico · Milano, IT

Key dates

• Filing date: Aug 2, 2011
• Grant date: Jul 15, 2014
• Expiry date: Aug 2, 2031

Classification

• Technology area (CPC —): General

Abstract

Disclosed herein is a device comprising a first terminal for a first clock signal, a second terminal for a second clock signal substantially complementary to the first clock signal, a third terminal for a third clock signal, a fourth terminal for a fourth clock signal substantially complementary to the third clock signal, a first logic gate to produce a first intermediate signal, a second logic gate to produce a second intermediate signal, a first delay circuit to produce a third intermediate signal, and a second delay circuit to produce a fourth intermediate signal, and a first output circuit coupled to the first and second delay circuits to produce the third and fourth clock signals respectively at the third and fourth terminals.