Conduction cooling of multi-channel flip chip based panel array circuits
US8780561B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2012 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Oct 5, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49146
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a heat-dissipating structure for semiconductor circuits is provided. First and second semiconductor integrated circuit (IC) chips are provided, where the first and second semiconductor chips each have first and second opposing sides, wherein the first and second semiconductor IC chips are configured to be fixedly attached to a top surface of a substantially planar circuit board along their respective first sides. The respective second opposing sides of each of the first and second semiconductor IC chips are coupled to first and second respective portions of a sacrificial thermal spreader material, the sacrificial thermal spreader material comprising a material that is thermally conductive. The first and second portions of the sacrificial thermal spreader material are planarized to substantially equalize a respective first height of the first semiconductor chip and a respective second height of the second semiconductor chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.