Memory device and method of writing data to a memory device
US8780615B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2012 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Aug 16, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/413
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a memory device, a bitline write voltage is applied to a first bitline. A wordline voltage is applied to a first wordline for writing data to a first memory cell connected to the first wordline and the first bitline. The first bitline and the second bitline are electrically connected for charge sharing between the first bitline and the second bitline. A predetermined time after electrically connecting the first bitline and the second bitline, the first and the second bitline are electrically disconnected and the bitline write voltage is applied to the second bitline. The wordline voltage is applied to a second wordline for writing data to a second memory cell connected to the second wordline and the second bitline.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.