Data input circuit of nonvolatile memory device
US8780645B2 · kind B2 · utility
1Cited by
1References
12Claims
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Key dates
| Filing date | Sep 7, 2011 |
| Grant date | Jul 15, 2014 |
| Priority date | — |
| Expiry date | Sep 6, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/824
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The data input circuit of a nonvolatile memory device includes a redundancy multiplexer configured to selectively output normal data and redundancy data to an internal global data line in response to a redundancy signal, a plurality of pipe registers coupled to the internal global data line and configured to latch normal data or redundancy data received through the internal global data line in response to a plurality of respective latch signals, and an output multiplexer configured to sequentially output the latched data in response to a plurality of selection signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.