Patent · US Active

Scalable and configurable system on a chip interrupt controller

US8782314B2 · kind B2 · utility

6Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 29, 2011
Grant dateJul 15, 2014
Priority date
Expiry dateJun 4, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH03K2005/00058
  • WIPO fieldBasic communication processes
  • WIPO sectorElectrical engineering

Abstract

Embodiments include a system and method for an interrupt controller that propagates interrupts to a subsystem in a system-on-a-chip (SOC). Interrupts are provided to an interrupt controller that controls access of interrupts to a particular subsystem in the SOC that includes multiple subsystems. Each subsystem in the SOC generates multiple interrupts to other subsystems in the SOC. The interrupt controller processes multiple interrupts and generates an interrupt output. The interrupt output is then transmitted to a particular subsystem.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.