Methods for forming fine patterns of a semiconductor device
US8785319B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2013 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Mar 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods of forming fine patterns are provided. The methods may include forming first hard mask patterns extending in a first direction on a lower layer, forming second hard mask patterns filling gap regions between the first hard mask patterns, forming first mask patterns extending in a second direction perpendicular to the first direction on the first and second hard mask patterns, etching the first hard mask patterns using the first mask patterns as etch masks to form first openings, forming second mask patterns filling the first openings and extending in the second direction, and etching the second hard mask patterns using the second mask patterns as etch masks to form second openings spaced apart from the first openings in a diagonal direction with respect to the first direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.