N-channel metal-oxide field effect transistor with embedded high voltage junction gate field-effect transistor
US8785988B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 2013 |
| Grant date | Jul 22, 2014 |
| Priority date | — |
| Expiry date | Jan 11, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/343
Abstract
A semiconductor device comprising a high-voltage (HV) n-type metal oxide semiconductor (NMOS) embedded HV junction gate field-effect transistor (JFET) is provided. An HV NMOS with embedded HV JFET may include, according to a first example embodiment, a substrate, an N-type well region disposed adjacent to the substrate, a P-type well region disposed adjacent to the N-type well region, and first and second N+ doped regions disposed adjacent to the N-type well and on opposing sides of the P-type well region. The P-type well region may comprise a P+ doped region, a third N+ doped region and a gate structure, the third N+ doped region being interposed between the P+ doped region and the gate structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.