Patent · US Active

Processing method and processing device of semiconductor wafer, and semiconductor wafer

US8790995B2 · kind B2 · utility

2Cited by
3References
14Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 16, 2012
Grant dateJul 29, 2014
Priority date
Expiry dateJun 7, 2032

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L21/3043
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

According to one embodiment, a substrate processing method is disclosed. The above method includes: grinding an outer edge portion on a back surface of a semiconductor wafer with a semiconductor element formed on its front surface with a first grindstone or blade to thereby form an annular groove; grinding a projecting portion on an inner side of the groove with a second grindstone to thereby form a recessed portion integrally with the groove on the back surface of the semiconductor wafer; and grinding a bottom surface of the recessed portion including a ground surface made by the second grindstone with a third grindstone.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.