Methods for fabricating integrated circuits with fluorine passivation
US8791003B2 · kind B2 · utility
4Cited by
1References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 21, 2012 |
| Grant date | Jul 29, 2014 |
| Priority date | — |
| Expiry date | Jun 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/02359
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating integrated circuits are provided. In an embodiment, a method for fabricating an integrated circuit includes providing a semiconductor substrate and forming a gate structure on the semiconductor substrate. The gate includes a high-k dielectric material. In the method, a fluorine-containing liquid is contacted with the high-k dielectric material and fluorine is incorporated into the high-k dielectric material.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.