Methods of manufacturing metal-silicide features
US8791528B2 · kind B2 · utility
7Cited by
61References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2010 |
| Grant date | Jul 29, 2014 |
| Priority date | — |
| Expiry date | Dec 3, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S438/926
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a microelectronic device including forming a dielectric layer surrounding a dummy feature located over a substrate, removing the dummy feature to form an opening in the dielectric layer, and forming a metal-silicide layer conforming to the opening. The metal-silicide layer may then be annealed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.