Three-dimensional semiconductor memory devices
US8796091B2 · kind B2 · utility
7Cited by
3References
7Claims
0Family size
Assignee
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Key dates
| Filing date | Aug 28, 2013 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Aug 28, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/693
Abstract
Provided are three-dimensional semiconductor devices. A device includes an electrode structure including conductive patterns sequentially stacked on a substrate, a semiconductor pattern penetrating the electrode structure and including channel regions adjacent to the conductive patterns and vertical adjacent regions between the channel regions, and a semiconductor connecting layer extending from an outer sidewall of the semiconductor pattern to connect the semiconductor pattern to the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.