Patent · US Active

Positioning and socketing for semiconductor dice

US8797053B2 · kind B2 · utility

2Cited by
6References
21Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 24, 2011
Grant dateAug 5, 2014
Priority date—
Expiry dateSep 24, 2032

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/2891
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

Devices and methods useful for testing bare and packaged semiconductor dice are provided. As integrated circuit chips become smaller and increasingly complex, the interface presented by a chip for connectivity with power supplies and other components of the system into which it is integrated similarly becomes smaller and more complex. Embodiments of the invention provide micron-scale accuracy alignment capabilities for fine pitch device first level interconnect areas. Embodiments of the invention employ air-bearings to effectuate the movement and alignment of a device under test with a testing interface. Additionally, testing interfaces comprising membranes supported by thermal fluids are provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.