Memory controller and method for accessing a plurality of non-volatile memory arrays
US8799607B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 6, 2011 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Jan 25, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7208
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory controller (16) is used in a system (10) having a main memory (22) and a set of non-volatile memories (26, 32, 38, 44). Each non-volatile memory comprises a plurality of sectors (S0-S28), pages, or other memory unit types. A command is received to write data to the set of non-volatile memories (26, 32, 38, 44). Within the data is identified a grouping of the data that is for writing to sectors in the set of non-volatile memories in which each non-volatile memory of the set of non-volatile memories is to be written and each sector to be written has a corresponding location to be written in all of the other non-volatile memories. Corresponding locations are locations that are in the same location in the sequential order. The grouping of data is written into the set of the non-volatile memories to result in the writing in the non-volatile memories occurring contemporaneously.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.