Memory management unit and method of accessing an address
US8799617B2 · kind B2 · utility
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20Claims
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Key dates
| Filing date | Aug 1, 2006 |
| Grant date | Aug 5, 2014 |
| Priority date | — |
| Expiry date | Apr 26, 2029 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0615
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory management unit comprises register and control logic and arranged to support a microprocessor controller unit accessing physical address space via an address bus wherein the microprocessor controller unit comprises a program counter having a first address size, the memory management unit wherein the register and control logic comprises a register having a second address size greater than the first address size and arranged to provide an extended address bus between the microprocessor controller unit and physical address space.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.