Package substrate unit and method for manufacturing package substrate unit
US8800142B2 · kind B2 · utility
5Cited by
4References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 8, 2011 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Dec 18, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldMachine tools
- WIPO sectorMechanical engineering
Abstract
A semiconductor chip mounting layer of a package substrate unit includes an insulation layer, a conductive seed metal layer formed on the top surface of the insulation layer, conductive pads formed on the top surface of the conductive seed metal layer, metal posts formed substantially in the central portion on the top surface of the conductive pads, and a solder resist layer that is formed to surround the conductive pads and the metal posts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.