MOS transistor with forward bulk-biasing circuit
US8803591B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 6, 2013 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Nov 6, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/0027
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
Forward bulk biasing circuitry for PMOS and NMOS transistors is provided. The bulk biasing circuitry includes two N-type MOS transistors, two P-type MOS transistors, and two capacitors. The forward bias to a bulk terminal of a transistor increases a threshold voltage of a transistor, thereby reducing a transition time and improving the performance of the transistor. The forward bias is provided only when the transistor transitions from one state to another, thereby reducing leakage power dissipation during active and standby modes of an integrated circuit that includes the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.