Implementing known scrambling relationship among multiple serial links
US8804960B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 22, 2010 |
| Grant date | Aug 12, 2014 |
| Priority date | — |
| Expiry date | Aug 18, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and circuit for implementing known scrambling relationship among multiple serial links, and a design structure on which the subject circuit resides are provided. A transmit Linear Feedback Shift Register (LFSR) is provided with each of the multiple serial links for scrambling transmitted data. A receive Linear Feedback Shift Register (LFSR) is provided with each of the multiple serial links for descrambling received data. Each of the transmit LFSRs is initialized to a unique value. Each transmit LFSR conveys a current unique value to a receive LFSR for synchronizing the transmit LFSR and receive LFSR to begin scrambling and descrambling data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.