Inventor · Rochester, MN, US

Wayne M. Barrett

25Patents
5h-index
33Co-inventors
69Inventor score

Filing activity: Nov 7, 1994 → Jun 11, 2021

Most-cited inventions

PatentTitleAreaCited byStatus
US5584033A Apparatus and method for burst data transfer employing a pause at fixed data intervals Physics 21 Expired
US8275922B2 Implementing serial link training patterns separated by random data for training a serial link in an interconnect system Electricity 9 Active
US7418068B2 Data capture technique for high speed signaling Emerging Cross-Sectional Technologies 9 Expired
US7392353B2 Prioritization of out-of-order data transfers on shared data bus Physics 6 Expired
US7890708B2 Prioritization of out-of-order data transfers on shared data bus Physics 5 Active
US7761669B2 Memory controller granular read queue dynamic optimization of command selection Physics 4 Active
US10423550B2 Managing efficient selection of a particular processor thread for handling an interrupt Physics 4 Active
US8103930B2 Apparatus for implementing processor bus speculative data completion Physics 3 Active
US7536514B2 Early return indication for read exclusive requests in shared memory architecture Physics 3 Active
US10552351B2 Techniques for issuing interrupts in a data processing system with multiple scopes Physics 3 Active
US8823558B2 Disparity reduction for high speed serial links Electricity 2 Active
US8010682B2 Early coherency indication for return data in shared memory architecture Physics 2 Active
US8804960B2 Implementing known scrambling relationship among multiple serial links Electricity 1 Active
US7817585B2 Data capture technique for high speed signaling Emerging Cross-Sectional Technologies 1 Active
US7454543B2 Early high speed serializer-deserializer (HSS)internal receive (Rx) interface for data sampling clock signals on parallel bus Electricity 1 Active
US6185646A Method and apparatus for transferring data on a synchronous multi-drop Physics 1 Expired
US7426672B2 Method for implementing processor bus speculative data completion Physics 1 Active
US11074205B2 Managing efficient selection of a particular processor thread for handling an interrupt Physics 0 Active
US9007240B2 Disparity reduction for high speed serial links Electricity 0 Active
US10565140B2 Techniques for issuing interrupts in a data processing system with multiple scopes Physics 0 Active
US10210112B2 Techniques for issuing interrupts in a data processing system with multiple scopes Physics 0 Active
US11645215B2 Efficient selection of a particular processor thread for handling an interrupt Physics 0 Active
US7735032B2 Early HSS Rx data sampling Electricity 0 Active
US12020066B2 Asynchronous completion notification in a multi-core data processing system Physics 0 Active
US8099562B2 Scalable interface for a memory array Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.