Replacement gate fin first wire last gate all around devices

US8809131B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Sarunya Bangsaruntip · Mount Kisco, US
• Josephine B. Chang · Mahopac, US
• Isaac Lauer · Yorktown Heights, US
• Jeffrey W. Sleight · Ridgefield, US

Key dates

• Filing date: Jul 17, 2012
• Grant date: Aug 19, 2014
• Expiry date: Jul 24, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/822

Abstract

In one aspect, a method of fabricating a nanowire FET device includes the following steps. A wafer is provided. At least one sacrificial layer and silicon layer are formed on the wafer in a stack. Fins are patterned in the stack. Dummy gates are formed over portions of the fins which will serve as channel regions, and wherein one or more portions of the fins which remain exposed will serve as source and drain regions. A gap filler material is deposited surrounding the dummy gates and planarized. The dummy gates are removed forming trenches in the gap filler material. Portions of the silicon layer (which will serve as nanowire channels) are released from the fins within the trenches. Replacement gates are formed within the trenches that surround the nanowire channels in a gate all around configuration. A nanowire FET device is also provided.