Inventor · Yorktown Heights, NY, US

Isaac Lauer

190Patents
14h-index
61Co-inventors
85Inventor score

Filing activity: Sep 10, 2007 → Sep 6, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US8669615B1 Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices Electricity 43 Active
US8809131B2 Replacement gate fin first wire last gate all around devices Electricity 38 Active
US9755017B1 Co-integration of silicon and silicon-germanium channels for nanosheet devices Electricity 35 Active
US8173993B2 Gate-all-around nanowire tunnel field effect transistors Electricity 31 Active
US9647139B2 Atomic layer deposition sealing integration for nanosheet complementary metal oxide semiconductor with replacement spacer Electricity 28 Active
US8658518B1 Techniques for metal gate work function engineering to enable multiple threshold voltage nanowire FET devices Performing Operations; Transporting 27 Active
US8716091B2 Structure for self-aligned silicide contacts to an upside-down FET by epitaxial source and drain Electricity 26 Active
US8785981B1 Non-replacement gate nanomesh field effect transistor with pad regions Electricity 26 Active
US9748404B1 Method for fabricating a semiconductor device including gate-to-bulk substrate isolation Electricity 22 Active
US8178400B2 Replacement spacer for tunnel FETs Electricity 18 Active
US8928083B2 Diode structure and method for FINFET technologies Electricity 18 Active
US9209095B2 III-V, Ge, or SiGe fin base lateral bipolar transistor structure and method Electricity 16 Active
US8900959B2 Non-replacement gate nanomesh field effect transistor with pad regions Electricity 15 Active
US9653547B1 Integrated etch stop for capped gate and method for manufacturing the same Electricity 15 Active
US8258031B2 Fabrication of a vertical heterojunction tunnel-FET Electricity 14 Active
US8669167B1 Techniques for metal gate workfunction engineering to enable multiple threshold voltage FINFET devices Electricity 14 Active
US8673731B2 Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices Electricity 14 Active
US8324030B2 Nanowire tunnel field effect transistors Electricity 13 Active
US9006087B2 Diode structure and method for wire-last nanomesh technologies Emerging Cross-Sectional Technologies 12 Active
US8969145B2 Wire-last integration method and structure for III-V nanowire devices Emerging Cross-Sectional Technologies 12 Active
US8927397B2 Diode structure and method for gate all around silicon nanowire technologies Emerging Cross-Sectional Technologies 12 Active
US8802527B1 Gate electrode optimized for low voltage operation Electricity 11 Active
US9391163B2 Stacked planar double-gate lamellar field-effect transistor Electricity 11 Active
US8659084B1 Techniques for gate workfunction engineering to reduce short channel effects in planar CMOS devices Electricity 11 Active
US9911592B2 Method for making nanosheet CMOS device integrating atomic layer deposition process and replacement gate structure Electricity 10 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.