Patent · US Active

High die strength semiconductor wafer processing method and system

US8809166B2 · kind B2 · utility

8Cited by
12References
9Claims
0Family size

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Key dates

Filing dateDec 20, 2012
Grant dateAug 19, 2014
Priority date
Expiry dateDec 20, 2032

Classification

  • Technology area (CPC B)Performing Operations; Transporting
  • CPC primaryB23K2103/50
  • WIPO fieldMachine tools
  • WIPO sectorMechanical engineering

Abstract

Embodiments of methods and systems for processing a semiconductor wafer are described. In one embodiment, a method for processing a semiconductor wafer involves performing laser stealth dicing on the semiconductor wafer to form a stealth dicing layer within the semiconductor wafer and after performing laser stealth dicing, cleaning the semiconductor wafer from a back-side surface of the semiconductor wafer with a blade to remove at least a portion of the stealth dicing layer. Other embodiments are also described.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.