Three dimensional semiconductor memory devices
US8809938B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2011 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Jul 10, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/40
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Three dimensional semiconductor memory devices are provided. The three dimensional semiconductor memory device includes a first stacked structure and a second stacked structure sequentially stacked on a substrate. The first stacked structure includes first insulating patterns and first gate patterns which are alternately and repeatedly stacked on a substrate, and the second stacked structure includes second insulating patterns and second gate patterns which are alternately and repeatedly stacked on the first stacked structure. A plurality of first vertical active patterns penetrate the first stacked structure, and a plurality of second vertical active patterns penetrate the second stacked structure. The number of the first vertical active patterns is greater than the number of the second vertical active patterns.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.