Method and apparatus for automatically configuring memory size
US8813018B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 5, 2012 |
| Grant date | Aug 19, 2014 |
| Priority date | — |
| Expiry date | Oct 5, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A logic design system operable to configure an integrated circuit device using custom logic design data is disclosed. The disclosed logic design system includes a computer-aided design tool that may be used to determine a memory space estimate based on a custom logic design data analysis. A memory size analysis may be performed on the custom logic design data to determine the maximum amount of stack memory that is required to execute procedures in the device. The logic design system may also monitor for changing memory requirements of the custom logic design. The logic design system may configure the device with the custom logic design data based on the memory space estimate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.