Method of fabricating a gate all around device
US8815691B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2012 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Dec 21, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
The device includes a wafer substrate including an isolation feature, a fin base embedded in the isolation feature, at least one channel disposed above the fin base, and a gate stack disposed around the channel, wherein the gate stack includes a top portion and a bottom portion of the gate stack formed by filling a cavity around the channel such that the top portion and bottom portion are aligned each other. The device further includes at least one source and one drain disposed over the fin base, wherein the channel connects the source and the drain. The device further includes the source and the drain disposed over a fin insulator disposed over the fin base.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.