FinFET device formation
US8815693B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 23, 2013 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Jan 23, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/215
Abstract
A method includes patterning a fin on a semiconductor substrate, depositing a local trench isolation (LTI) layer on the semiconductor substrate, patterning a gate stack over a channel region of the fin and over a portion of the LTI layer, depositing a first capping layer over exposed portions of the LTI layer, performing an etching process to remove oxide material from exposed portions of the fin, and epitaxially growing a semiconductor material from exposed portions of the fin to define active regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.