State retention power gated cell
US8816741B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2013 |
| Grant date | Aug 26, 2014 |
| Priority date | — |
| Expiry date | Aug 13, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/0375
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A state retention power gated (SRPG) cell includes an input control circuit having an input coupled to an input signal and an output. The input control circuit includes has transistors configured as a first inverter transmission gate. The transistors also connect in series at least one transistor controlled by a power gating signal. A first latch has an input coupled to the output of the input control circuit and an output. A transmission gate has an input coupled to the output of the first latch and an output that is an output of the SRPG cell. A second latch has an input coupled to the output of the transmission gate and an output that also is an output of the SRPG cell. A second inverter transmission gate has an input coupled to the output of the second latch.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.