Use of plate oxide layers to increase bulk oxide thickness in semiconductor devices
US8822296B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 31, 2012 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | Jan 1, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/663
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and methods for making such devices are described. The semiconductor devices are made by providing a semiconductor substrate with an active region, providing a bulk oxide layer in a non-active portion of the substrate, the bulk oxide layer having a first thickness in a protected area of the device, providing a plate oxide layer over the bulk oxide layer and over the substrate in the active region, forming a gate structure on the active region of the substrate, and forming a self-aligned silicide layer on a portion of the substrate and the gate structure, wherein the final thickness of the bulk oxide layer in the protected area after these processes remains substantially the same as the first thickness. The thickness of the bulk oxide layer can be increased without any additional processing steps or any additional processing cost. Other embodiments are described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.