Inter-word-line programming in arrays of analog memory cells
US8824214B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2012 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | May 7, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C27/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes selecting a word line for programming in an array of analog memory cells that are arranged in rows associated with respective word lines and columns associated with respective bit lines. Word-line voltages, which program the memory cells in the selected word line, are applied to the respective word lines. Bit-line voltages, which cause one or more additional memory cells outside the selected word line to be programmed as a result of programming the selected word line, are applied to the respective bit lines. Using the applied word-line and bit-line voltages, data is stored in the memory cells in the selected word line and the additional memory cells are simultaneously programmed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.