Link between chips using virtual channels and credit based flow control
US8824295B2 · kind B2 · utility
1Cited by
5References
9Claims
0Family size
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Key dates
| Filing date | Dec 30, 2011 |
| Grant date | Sep 2, 2014 |
| Priority date | — |
| Expiry date | Sep 18, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/7825
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A system and method is disclosed for multiple chips in which the connection between chips is made with registered inputs and registered outputs. This is achieved using a credit-based flow control protocol between the chips. The connection is made as part of a single packet-based on-chip and between-chip network with a common address space between the two chips.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.