Method of forming a dual-trench field effect transistor
US8829641B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 29, 2010 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Nov 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/393
Abstract
In one general aspect, a method of forming a field effect transistor can include forming a well region in a semiconductor region of a first conductivity type where the well region is of a second conductivity type and has an upper surface and a lower surface. The method can include forming a gate trench extending into the semiconductor region to a depth below a depth of the lower surface of the well region, and forming a stripe trench extending through the well region and into the semiconductor region to a depth below the depth of the gate trench. The method can also include forming a contiguous source region of the first conductivity type in the well region where the source region being in contact with the gate trench and in contact with the stripe trench.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.