Double density I2C system
US8832343B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 17, 2012 |
| Grant date | Sep 9, 2014 |
| Priority date | — |
| Expiry date | Mar 4, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2213/0016
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An I2C system comprises an inter-integrated circuit (I2C) master device coupled to an I2C multiplexer via a master I2C bus. A plurality of slave I2C busses emanating from the I2C multiplexer couple the I2C multiplexer to a plurality of I2C slave devices. Each of the slave I2C busses comprises a serial data (SDA) line and serial clock (SCL) line. Each of the slave I2C busses, which is coupled to two I2C slave devices, has a first channel and a second channel. The first channel puts bidirectional serial data on the SDA line and clock signals on the SCL line, and the second channel puts bidirectional serial data on the SCL line and clock signals on the SDA line. A channel selector, associated with the I2C multiplexer, selectively couples the I2C master device to one of the two I2C slave devices via the first channel or the second channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.