Inventor · Carrboro, NC, US

Michael DeCesaris

46Patents
4h-index
30Co-inventors
55Inventor score

Filing activity: Oct 7, 2011 → Mar 31, 2020

Most-cited inventions

PatentTitleAreaCited byStatus
US8898358B2 Multi-protocol communication on an I2C bus Physics 41 Active
US8832343B2 Double density I2C system Physics 5 Active
US8990465B2 Device presence detection using a single channel of a bus Physics 5 Active
US9411770B2 Controlling a plurality of serial peripheral interface (‘SPI’) peripherals using a single chip select Physics 4 Active
US8928393B1 Temperature switch circuit having dynamic temperature thresholds Electricity 3 Active
US9015394B2 Chip select (‘CS’) multiplication in a serial peripheral interface (‘SPI’) system Electricity 3 Active
US9465761B2 Managing slave devices Physics 3 Active
US8959380B2 Dynamically optimizing bus frequency of an inter-integrated circuit (‘I2C’) bus Physics 2 Active
US8959264B2 Auto-switching interfaces to device subsystems Physics 2 Active
US10034420B2 DIMM extraction tool Emerging Cross-Sectional Technologies 2 Active
US8954619B1 Memory module communication control Physics 2 Active
US8954634B2 Operating a demultiplexer on an inter-integrated circuit (‘I2C’) bus Physics 2 Active
US8831772B2 Lift apparatus for stable placement of components into a rack Physics 1 Active
US8811587B2 Selectively filtering incoming communications events in a communications device Electricity 1 Active
US8984196B2 Accessing peripheral devices Physics 1 Active
US8904078B2 High speed serial peripheral interface system Physics 1 Active
US9811660B2 Securing a shared serial bus Physics 1 Active
US8909844B2 Inter-integrated circuit (I2C) multiplexer switching as a function of clock frequency Physics 1 Active
US9396768B2 Regulating voltage responsive to the shortest aggregate distance to the installed memory modules Physics 1 Active
US9471433B2 Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets Physics 1 Active
US9384787B2 Selecting a voltage sense line that maximizes memory margin Physics 1 Active
US9471329B2 Optimizing computer hardware usage in a computing system that includes a plurality of populated central processing unit (‘CPU’) sockets Physics 1 Active
US8832538B2 Detecting data transmission errors in an inter-integrated circuit (‘I2C’) system Electricity 0 Active
US9367442B2 Allocating memory usage based on voltage regulator efficiency Emerging Cross-Sectional Technologies 0 Active
US9239809B2 Message broadcast in a 1-wire system Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.