Method of fabricating a semiconductor test probe head
US8832933B2 · kind B2 · utility
5Cited by
1References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2011 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Aug 29, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49867
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A testing probe card for wafer level testing semiconductor IC packaged devices. The card includes a circuit board including testing circuitry and a testing probe head. The probe head includes a probe array having a plurality of metallic testing probes attached to a substrate including a plurality of conductive vias. In one embodiment, the probes have a relatively rigid construction and have one end that may be electrically coupled to the vias using a flip chip assembly solder reflow process. In one embodiment, the probes may be formed from a monolithic block of conductive material using reverse wire electric discharge machining.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.