Package-on-package assembly with wire bond vias
US8836136B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 24, 2012 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Feb 24, 2032 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49151
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic package can include wire bonds having bases bonded to respective conductive elements on a substrate and ends opposite the bases. A dielectric encapsulation layer extending from the substrate covers portions of the wire bonds such that covered portions of the wire bonds are separated from one another by the encapsulation layer, wherein unencapsulated portions of the wire bonds are defined by portions of the wire bonds which are uncovered by the encapsulation layer. Unencapsulated portions can be disposed at positions in a pattern having a minimum pitch which is greater than a first minimum pitch between bases of adjacent wire bonds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.