Phase-locked loops that share a loop filter and frequency divider
US8836390B2 · kind B2 · utility
2Cited by
5References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 27, 2013 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Sep 27, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/099
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated circuit die stack includes a first die having a first phase locked loop (PLL) and a second die having a second PLL. The first PLL includes a first voltage controlled oscillator (VCO) and the second PLL includes a second VCO. The first VCCO and the second VCCO share a frequency divider and a loop filter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.