Memory
US8837193B2 · kind B2 · utility
1Cited by
1References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2013 |
| Grant date | Sep 16, 2014 |
| Priority date | — |
| Expiry date | Mar 14, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory in accordance with an embodiment of the present invention may include a first page buffer, a second page buffer arranged adjacent to the first page buffer in a first direction, a global pad arranged between the first page buffer and the second page buffer, and a first bit line selection unit arranged adjacent to the first page buffer and the second page buffer in a second direction substantially perpendicular to the first direction, wherein a first bit line pad is formed at a center of the a first bit line selection unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.